MB40168/MB40178
s PIN DESCRIPTION
Pin No.
Symbol
I/O
QFP-44 SH-DIP-48
Name & Function
VCCD 19, 28, 37 26, 36, 37, 47 — Digital Power Supply pins (+ 5 V).
VCCA 20, 27, 36 27, 34, 35, 46 — Analog Power Supply pins (+ 5 V).
DGND
16, 30,
39, 40
1, 24, 39
—
Digital Ground (0 V). These pins should be connected to the
analog ground on the application system.
AGND
17, 18,
29, 38
25, 38, 48
—
Analog Ground (0 V). These pins should be connected to the
analog ground on the application system.
DA8 - DA1 7 - 14
15 - 22
O ADC Digital Output pins. TTL level.
ADCLK
15
23
I ADC Clock Input pin. TTL level.
VRT
21
28
I ADC Reference Voltage Input pin. (5 V Input)
VINC
22
Sync Tip Clamp Circuit Analog Input pin. (0 - 3 V, 1.95 VP-P).
29
I When a clamp circuit is not used, this pin is connected to
ground.
VOUTC
23
Clamp Circuit Analog Output pin. It is used by adding a
30
O capacitor (1 µF or more) between VCLMP and VOVTC pins.
When a clamp circuit is not used, this pin is left open.
VCLMP
24
31
O
Clamp Voltage Output pin (3.05V Output). When a clamp
circuit is not used, this pin is left open.
VINA
25
32
I ADC Analog Signal Input pin. (3 - 5 V)
VRM
26
33
—
ADC Middle Reference Voltage Monitor pin. (Mid of VRT - VRB
is set to this pin). Normally this pin is left open.
VRB
31
41
I ADC Reference Voltage Input pin. (3 V)
VREF
32
Reference Voltage Output pin. (Resistor Divider, 3 V)
42
O By connecting this pin to VRB pin, 3V Voltages are generated.
When a reference voltage is not used, this pin is left open.
VRIN
33
43
I DAC Reference Voltage Input pin (3 V)
COMP
34
Phase Compensation Capacitor pin. (Capacitor greater than
44
— 0.1 µF should be connected between this pin and Analog
Ground.)
AOUT
35
45
O Analog Signal Output pin
DACLK
41
2
I DAC Clock Input pin. TTL level.
DD9 - DD1
1 - 6 *1
42 - 44
3 - 11*2
I DAC Digital Data Input pins. TTL level.
*1: MB40168 (MSB: 6 pin, LSB: 42 pin), MB40178 (MSB: 42 pin, LSB: 6 pin)
*2: MB40168 (MSB: 11 pin, LSB: 3 pin), MB40178 (MSB: 3 pin, LSB: 11 pin)
4