LC587004 Ver la hoja de datos (PDF) - SANYO -> Panasonic

Número de pieza

componentes Descripción

Fabricante

LC587004

Single-Chip 4-Bit Microprocessors with LCD Driver, 2 Kb RAM, and 8, 12, or 16 KB ROM on chip

SANYO -> Panasonic 

LC587008, 587006, 587004

Specifications

The electrical characteristics specified here are provisional and subject to change.

Absolute Maximum Ratings at VSS = 0 V, Ta = 25°C

Parameter

Maximum supply voltage

Maximum input voltage

Maximum output voltage

Output pin current

Allowable power dissipation

Operating temperature

Storage temperature

Symbol

Conditions

min

typ

max

Unit

VDD

–0.3

+7.0

V

VDD1

–0.3

VDD

V

VDD2

–0.3

VDD

V

VI (1) Allowed in the specified circuit (Figure 1), XTIN, CFIN Allowed up to the generated voltage

S1 to S4, K1 to K4, P1 to P4, SO1 to SO4, A1to A4,RES,

VI (2)

INT, TST, (With the K, P, M, SO and ports in input mode)

–0.3

VDD + 0.3

V

VO (1)

Allowed in the specified circuit (Figure 1), XTOUT,

CFOUT

Allowed up to the generated voltage

K1 to K4, P1 to P4, SO1 to SO4, A1 to A4, N1 to N4,

VO (2) CUP1, CUP2, Seg1 to Seg35, COM1 to COM4

–0.3

(With the K, P, M, SO and A ports in output mode)

VDD + 0.3

V

VO (3) Open drain specifications, N1 to N4 (N ch)

–0.3

IO (1)

N1 to N4

0

IO (2)

Per pin

–10

IO (3)

K1 to K4, P1 to P4, M1 to M4, SO1 to SO4,

0

IO (4)

A1 to A4

–5

Σ IO (1) Total current K1 to K4, P1 to P4, M1 to M4, SO1 to

Σ IO (2) for all pins

SO4, A1 to A4, N1 to N4, Seg1 to Seg35

–70

Pd max QIP80 flat package

+13

V

+15 mA

0 mA

5 mA

0 mA

70 mA

mA

500 mW

Topg

–30

+70 °C

Tstg

–55

+125 °C

Allowable Operating Ranges at VSS = 0 V, Ta = –30 to +70°C

Parameter

Supply voltage

Hold supply voltage

Symbol

VDD

VHD

Conditions

LCD unused specifications: VDD1 = VDD2 = VDD

Static specifications: VDD1 = VDD2 = VDD

1/2 bias specifications: VDD1 = VDD2 ≈ 2 × 1/2 VDD

1/3 bias specifications: VDD1 ≈ 2 × 1/3 VDD,

VDD2 ≈ 1/3 VDD

Voltage required to hold the contents of RAM and

the registers*

min

typ

2.0

2.0

2.8

2.8

2.0

max

Unit

6.0

V

6.0

V

6.0

V

6.0

V

VDD

V

Input high level voltage

Input low level voltage

VIH1

VIL1

S1 to S4, K1 to K4, P1 to P4, M1 to M4, SO1 to SO4,

A1 to A4, INT, (With the K, P, M, SO and ports in input

mode)

0.7 VDD

0

VDD

V

0.3 VDD

V

Input high level voltage

Input low level voltage

Input high level voltage

Input low level voltage

Operating frequency 1

Operating frequency 2

Operating frequency 3

Operating frequency 4

Operating frequency 5

Operating frequency 6

Operating frequency 7

Operating frequency 8

Operating frequency 9

Operating frequency 10

VIH2

VIL2

VIH3

VIL3

fopg1

fopg2

fopg3

fopg4

fopg5

fopg6

fopg7

fopg8

fopg9

fopg10

RES pin

CFIN pin

VDD = 2.0 to 6.0 V, 32 kHz

VDD = 2.2 to 6.0 V. 38 kHz

VDD = 2.2 to 6.0 V, 65 kHz

XTIN/XTOUT crystal

oscillator

VDD = 2.2 to 6.0 V

VDD = 2.5 to 6.0 V

VDD = 2.5 to 6.0 V

CFIN/CFOUT CF specifications

VDD = 2.8 to 6.0 V

VDD = 4.0 to 6.0 V, CFIN/CFOUT RC specifications

VDD = 2.0 to 6.0 V, CFIN/CFOUT EXT specifications

VDD = 3.0 to 6.0 V, O1/SO3 pins (in serial mode),

Rising and falling edges on the input signals and

clock waveform of the SO1/SO3 pins (in serial mode)

must be 10 µs or less.

0.75 VDD

0

0.75 VDD

0

32

37

60

190

190

190

190

100

190

DC

VDD

V

0.25 VDD

V

VDD

V

0.25 VDD

V

33 kHz

39 kHz

70 kHz

810 kHz

1200 kHz

2300 kHz

4200 kHz

1500 kHz

800 kHz

200 kHz

Note: In the state where the CF/RC oscillator and/or the crystal oscillator are completely stopped and the internal circuits are completely stopped.

No. 4435-20/29

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