UT553B-RTIGCX Ver la hoja de datos (PDF) - Aeroflex UTMC
Número de pieza
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UT553B-RTIGCX Datasheet PDF : 52 Pages
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BIPHASE OUTPUTS
NAME
PIN NUMBER
LCC
PGA
BIPHASE OUT A Z
28
K8
TYPE
TO
BIPHASE OUT A O
27
L8
TO
BIPHASE OUT B Z
30
L10
TO
BIPHASE OUT B O
32
L11
TO
ACTIVE
--
--
--
--
DESCRIPTION
Transmitter - Channel A, Zero Output. This
Manchester-encoded data output is connected
to the 1553 bus transmitter input. The output is
idle low.
Transmitter - Channel A, One Output. This
output is the complement of BIPHASE OUT
A Z. The output is idle low.
Transmitter - Channel B, Zero Output. This
Manchester-encoded data output is connected
to the 1553 bus transmitter. The output is idle
low.
Transmitter - Channel B, One Output. This
output is the complement of BIPHASE OUT
B Z. The output is idle low.
MASTER RESET AND CLOCK
NAME
PIN NUMBER
LCC
PGA
MRST
40
G10
TYPE
TUI
12MHz
35
K11
TI
2MHz
24
L7
TO
ACTIVE
AL
--
--
DESCRIPTION
Master Reset. Initializes all internal functions of the
RTI. MRST must be asserted 500 nanoseconds
before normal RTI operation. (500ns minimum).
12MHz Input Clock. This is the RTI system clock
that requires an accuracy greater than 0.01% with a
duty cycle from 50% ±10%.
2MHz Clock Output. This is a 2MHz output gener-
ated by the 12MHz input clock. This clock is
stopped when MRST is low.
POWER AND GROUND
NAME
PIN NUMBER
LCC
PGA
VDD
54
B10
VSS
12
K2
42
F10
TYPE
PWR
GND
GND
ACTIVE
--
--
--
DESCRIPTION
+5VDC. Power supply must be +5VDC ±10%.
Ground reference. Zero VDC logic ground.
RTI-18
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