LND-TRN902 Ver la hoja de datos (PDF) - Linear Dimensions Semiconductor
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LND-TRN902 Datasheet PDF : 12 Pages
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PLL-FREQUENCY SYNTHESIZER PROPOSED DATA SHEET
Internal Registers
R Counter Re gister
1
1
R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R134 R14 R15 R16
Note: R16 is the MSB of the R counter value. R16 is the first bit which is transferred to the TH7010.
N & A Counter Re gister
Dual Mode
0 1 N1 N2 N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 A1 A2 A3 A4 A5 A6 A7
Single Mode
0 1 N1 N2 N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14
Note: N14 is the MSB of the N counter value; A7 is the MSB of the A counter value. A7 is the first bit which is transferred to the TH7010.
Reduced Status Re gister
0 0 B14 B13 B12 B11
B11 is the first bit which is
transferred to the TH7010.
Output PD Phase Detector (pin 10)
B14 B13 B12
Min.
Typ .
Max.
Unit
0
0
0
0.140
0.175
0.210
mA
0
0
1
0.200
0.250
0.300
mA
0
1
0
0.280
0.350
0.420
mA
0
1
1
0.400
0.500
0.600
mA
1
0
0
0.560
0.700
0.840
mA
1
0
1
0.800
1.000
1.200
mA
1
1
0
1.120
1.400
1.680
mA
1
1
1
1.600
2.000
2.400
mA
Stand By
0.1
50
nA
Note: These values are valid under the following conditions VDD = 4.5 ... 5.5 V,
Vcp = 2.5 V, Iref = 100 µA.
Anti Backlash Pulse Width
B8
B7
Min.
Typ .
Max.
Unit
0
0
1.6
2
2.4
ns
0
1
3.2
4
4.8
ns
1
0
4.8
6
7.2
ns
1
1
8
10
12
ns
The above values are valid for VDD = 4.5 ... 5.5 V
0
0
1.2
2
2.4
ns
0
1
2.4
4
5.6
ns
1
0
3.6
6
7.2
ns
1
1
8
10
12
ns
The above values are valid for VDD = 2.7 ... 3.3 V
The best system performance is reached with the shortest ABL pulse
Linear Dimensions, Inc. 445 East Ohio Street, Chicago, IL 60611 p 312.3211810 f 312.321.1830
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