HMP8156ACN(2009) Ver la hoja de datos (PDF) - Intersil
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componentes Descripción
Fabricante
HMP8156ACN Datasheet PDF : 34 Pages
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HMP8154, HMP8156A
DATA WRITE
S
DATA READ
CHIP ADDR
0x40 OR
0x42
A SUB ADDR
A
DATA
REGISTER
POINTED
TO BY
SUBADDR
A
DATA
AP
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
S = START CYCLE
P = STOP CYCLE
A = ACKNOWLEDGE
NA = NO ACKNOWLEDGE
FROM MASTER
S CHIP ADDR A SUB ADDR A S CHIP ADDR A DATA
A DATA
NA P
0x40 OR
0x42
0x41 OR
0x43
REGISTER
POINTED
TO BY
SUBADDR
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
FIGURE 21. REGISTER WRITE PROGRAMMING FLOW
TABLE 11. PRODUCT ID REGISTER
FROM ENCODER
BIT
NUMBER
FUNCTION
7-0
Product ID
SUB ADDRESS = 00H
DESCRIPTION
This 8-bit register specifies the last two digits of the product number. It is a read-only register.
Data written to it is ignored.
RESET
STATE
54H
BIT
NUMBER
FUNCTION
7-5
Video Timing
Standard
4-3
Output Format
2-0
Reserved
TABLE 12. OUTPUT FORMAT REGISTER
SUB ADDRESS = 01H
DESCRIPTION
000 = (M) NTSC
001 = (M) NTSC with a 0 IRE setup; also called (NSM) NTSC
010 = (B, D, G, H, I) PAL
011 = (M) PAL
100 = (N) PAL
101 = combination (N) PAL; also called (CN) PAL
110 = reserved
111 = reserved
00 = Composite + Y/C
01 = reserved
10 = Composite + RGB (no sync on green)
11 = Composite + RGB (with sync on green)
RESET
STATE
000B
00B
000B
18
FN4343.5
August 20, 2009
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