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HMP8156 Ver la hoja de datos (PDF) - Intersil

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componentes Descripción
Fabricante
HMP8156
Intersil
Intersil Intersil
HMP8156 Datasheet PDF : 33 Pages
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HMP8156
BIT
NUMBER
FUNCTION
7
Software Reset
6
Power Down
Enable
5
NTSC/PAL 2
Output Mode
4
Closed Caption
Line 21
Write Status
3
Closed Caption
Line 284
Write Status
2-0
Reserved
TABLE 17. HOST CONTROL REGISTER
SUB ADDRESS = 0FH
DESCRIPTION
Setting this bit to “1” initiates a software reset. It is automatically reset to a “0” after the
reset sequence is complete.
0 = Normal operation
1 = Power down mode
0 = Enabled
1 = Disabled
0 = Caption_21A and Caption_21B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
RESET
STATE
0B
0B
0B
1B
0 = Caption_284A and Caption_284B data registers contain unused data
1B
1 = Data has been output, host processor may now write to the registers
000B
BIT
NUMBER
FUNCTION
7-0
Line 21 Caption
Data
(First Byte)
TABLE 18. CLOSED CAPTION_21A DATA REGISTER
SUB ADDRESS = 10H
DESCRIPTION
This register is cascaded with the closed caption_21B data register and they are read
out serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of
the 21A data register is shifted out first.
RESET
STATE
80H
BIT
NUMBER
FUNCTION
7-0
Line 21 Caption
Data
(Second Byte)
TABLE 19. CLOSED CAPTION_21B DATA REGISTER
SUB ADDRESS = 11H
DESCRIPTION
This register is cascaded with the closed caption_21A data register and they are read
out serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of
the 21A data register is shifted out first.
RESET
STATE
80H
BIT
NUMBER
FUNCTION
7-0
Line 284 Caption
Data
(First Byte)
TABLE 20. CLOSED CAPTION_284A DATA REGISTER
SUB ADDRESS = 12H
DESCRIPTION
This register is cascaded with the closed caption_284B data register and they are read
out serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit
D0 of the 284A data register is shifted out first.
RESET
STATE
80H
19

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