Rev.4.2_00
SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
Measurement Circuits
1.
VIN
VOUT
VSS
+
A
+
V
Figure 9
2.
+
A
VIN
VOUT
VSS
Figure 10
3.
+
VIN VOUT
A
+
V
VSS
Standard Circuit
Figure 11
INPUT
CIN*1
VIN
VOUT
VSS
OUTPUT
CL*2
Single GND
GND
*1. CIN is a capacitor used to stabilize input.
*2. In addition to tantalum capacitor, ceramic capacitor of 0.1 µF or more can be used for CL.
Figure 12
Caution The above connection diagram and constant will not guarantee successful operation.
Perform through evaluation using the actual application to set the constant.
Seiko Instruments Inc.
11