8 PIN DIP HIGH SPEED 1Mbit/s TRANSISTOR 6N135 6N136
PHOTOCOUPLER
EL450X series
Figure 8 Switching Time Test Circuit & Waveform
Figure 9 Transient Immunity Test Circuit &
Waveform
Note:
*3 Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the
leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high
state (i.e., VO > 2.0V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the
trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state
(i.e., VO < 0.8V).
: Everlight Electronics Co., Ltd.
Document No DPC-0000112
Rev.1
7
http://www.everlight.com
October 4, 2011