AU80610006237AASLBX9 Ver la hoja de datos (PDF) - Intel
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AU80610006237AASLBX9 Datasheet PDF : 88 Pages
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Introduction
1.2.2
1.2.3
• Maximum of 2-GB system memory capacity supported on one SO-DIMM or two SO-
DIMMs
• Memory organizations supported (refer to the Platform Design Guide for more
details - DIMM populating rules and Clock/Control signals ordering):
— Two SO-DIMMs
— One SO-DIMM only
Direct Media Interface Features
• Compliant to Direct Media Interface (DMI)
• Support 2 lanes in each direction, point-to-point DMI interface to the chipset
• Raw bit-rate on the data pins of 2.5Gb/s, resulting in a real bandwidth per pair of
250MB/s given the 8b/10b encoding used to transmit data across this interface.
Does not account for packet overhead and link maintenance
• Maximum theoretical bandwidth on interface of 500MB/s in each direction
simultaneously, for an aggregate of 1GB/s for the interface
• 100-MHz reference clock
• 64-bit downstream address (only 36-bit addressable from the processor)
• APIC messaging support. Will send Intel-defined “End of Interrupt†broadcast
message when initiated by the processor
• Message Signaled Interrupt (MSI) messages supported
• Power Management state change messages supported
• SMI, SCI and SERR error indication
• Legacy support for ISA regime protocol (PHOLD/PHOLDA) required for parallel port
DMA, floppy drive, and LPC bus masters
• Hybrid AC-DC coupling solution between the processor and the chipset
• Polarity inversion supported
Integrated Graphics Controller
• The integrated graphics controller contains a refresh of the 3rd generation graphics
core
• Intel® Dynamic Video Memory Technology 4.0
• Directx* 9 compliant Pixel Shader 2.0
• 200-MHz render clock frequency
• Two display ports: LVDS and RGB
— Integrated single LVDS channel support resolution up to 1280*800 or 1366*768
— Analog RGB display output up to resolution 1400x1050 @ 60Hz
• Intel® Clear Video Technology
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Datasheet
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