6.1
Reset
VI
TLE4263-2ES
Application Information
VQ
VQ,rt
1V
VD
VDU
VDRL
trd
trd
VRO
t
t < trr
trr
trd
t
trd
t
VRO,l 1V
t
Thermal
S h u td o wn
In p u t
Voltage Dip
Under-
vo lta g e
Spike at Over-
output load
Ti mi n g Di a g ra m_ Re se t.vsd
Figure 4 Reset Timing Diagram
Power-On Reset Delay Time
If the application needs a power-on reset delay time trd different from the value given in Item 5.7.5, the delay
capacitor’s value can be derived from these specified values and the desired power-on delay time:
CD
=
t--r--d---,--n---e--w-- × 100nF
trd
Data Sheet
17
Rev. 1.0, 2008-04-21