CXA1875AP/AM
Definition of I2C Register
<Slave address>
MSB
LSB
0
1
0
0 SAD2 SAD1 SAD0 R/W
0: SLAVE RECEIVER
R/W 1: SLAVE TRANSMITTER
SAD 0 to 2: 11 to 13 pin
0: "LOW"
1: "HIGH"
<Register table>
• With the IC reset all registers are reset to 0
• ∗: Not defined
• ×: Don’t care
• Sub address is auto incremented
• It can be used as a 6-bit D/A converter by setting the lower two bits of DAC 0-4 registors to 0, but take care
that the max. voltage of DA output will lower about 100 mV compared with the use of 8 bits.
Control Register
Sub address
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
× × × × × 000
REF
∗
∗
∗
SW3 SW2 SW1 SW0
× × × × × 001
DAC0 (8)
× × × × × 010
DAC1 (8)
× × × × × 011
DAC2 (8)
× × × × × 100
DAC3 (8)
× × × × × 101
DAC4 (8)
Status Register
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
PONRES 0
0
0
ST3 ST2 ST1 ST0
—6—