MCF5213 Family Configurations
Table 1. MCF5213 Family Configurations (continued)
Module
5211
5212
5213
Chip Configuration and Reset Controller Module
x
x
x
Background Debug Mode (BDM)
JTAG - IEEE 1149.1 Test Access Port1
x
x
x
x
x
x
Package
64 LQFP
64 QFN
81 MAPBGA
64 LQFP
81 MAPBGA
81 MAPBGA
100 LQFP
NOTES:
1 The full debug/trace interface is available only on the 100-pin packages. A reduced debug interface is bonded on
smaller packages.
1.1 Block Diagram
Figure 1 shows a top-level block diagram of the MCF5213. Package options for this family are described
later in this document.
MCF5213 Microcontroller Family Hardware Specification, Rev. 1.2
Freescale Semiconductor
Preliminary
3