IDT49C460/A/B/C/D/E
32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SC OUTPUTS
The tables below indicate how the SC0–7 outputs are
generated in each control mode of various CODE IDs (Internal
Control Mode not applicable).
Generate
SC0 ←
SC1 ←
SC2 ←
SC3 ←
SC4 ←
SC5 ←
SC6 ←
SC7 ←
Diagnostic
Generate
SC0 ←
SC1 ←
SC2 ←
SC3 ←
SC4 ←
SC5 ←
SC6 ←
SC7 ←
00
PH0
PA
PB
PC
PD
PE
PF
—
Final
Check Bits
00
DL0
DL1
DL2
DL3
DL4
DL5
DL6
—
Final
Check Bits
CODE ID1,0
10
PH1
PA
PB
PC
PD
PE
PF
PF
Partial
Check Bits
11
PH2 ⊕ CB0
PA ⊕ CB1
PB ⊕ CB2
PC ⊕ CB3
PD ⊕ CB4
PE ⊕ CB5
PF ⊕ CB6
PG ⊕ CB7
Final
Check Bits
2584 tbl 17
Correct/
Detect
SC0 ←
SC1 ←
SC2 ←
SC3 ←
SC4 ←
SC5 ←
SC6 ←
SC7 ←
00
PH0 ⊕ C0
PA ⊕ C1
PB ⊕ C2
PC ⊕ C3
PD ⊕ C4
PE ⊕ C5
PF ⊕ C6
—
Final
Syndrome
CODE ID1,0
10
PH1 ⊕ C0
PA ⊕ C1
PB ⊕ C2
PC ⊕ C3
PD ⊕ C4
PE ⊕ C5
PF ⊕ C6
PF ⊕ C7
Partial
Syndrome
CODE ID1,0
10
DL0
DL1
DL2
DL3
DL4
DL5
DL6
DL7
Partial
Check Bits
11
DL32
DL33
DL34
DL35
DL36
DL37
DL38
DL39
Final
Check Bits
2584 tbl 18
Diagnostic
Correct/
Detect
SC0 ←
SC1 ←
SC2 ←
SC3 ←
SC4 ←
SC5 ←
SC6 ←
SC7 ←
00
PH0 ⊕ DL0
PA ⊕ DL1
PB ⊕ DL2
PC ⊕ DL3
PD ⊕ DL4
PE ⊕ DL5
PF ⊕ DL6
—
Final
Syndrome
CODE ID1,0
10
PH1 ⊕ DL0
PA ⊕ DL1
PB ⊕ DL2
PC ⊕ DL3
PD ⊕ DL4
PE ⊕ DL5
PF ⊕ DL6
PF ⊕ DL7
Partial
Syndrome
CODE ID1,0
PASSTHRU
00
10
11
SC0 ←
C0
C0
CB0
SC1 ←
C1
C1
CB1
SC2 ←
C2
C2
CB2
SC3 ←
C3
C3
CB3
SC4 ←
C4
C4
CB4
SC5 ←
C5
C5
CB5
SC6 ←
C6
C6
CB6
SC7 ←
—
C7
CB7
2584 tbl 21
Table 12. SC0-7 Outputs For Different Control Modes
11
PH2 ⊕ CB0
PA ⊕ CB1
PB ⊕ CB2
PC ⊕ CB3
PD ⊕ CB4
PE ⊕ CB5
PF ⊕ CB6
PG ⊕ CB7
Final
Syndrome
2584 tbl 19
11
PH2 ⊕ CB0
PA ⊕ CB1
PB ⊕ CB2
PC ⊕ CB3
PD ⊕ CB4
PE ⊕ CB5
PF ⊕ CB6
PG ⊕ CB7
Final
Syndrome
2584 tbl 20
11.6
14