HT46R016/HT46R017
Enhanced A/D Type 8-Bit OTP MCU
A.C. Characteristics
Symbol
Parameter
Test Conditions
VDD
Condition
2.2~5.5V
fSYS
System clock
— 3.3~5.5V
4.5~5.5V
3.3V/5V Ta=25˚C
5V Ta=25˚C
3.3V/5V Ta=0~70˚C
5V Ta=0~70˚C
fHIRC
System clock (HIRC)
2.2V~3.6V Ta=0~70°C
3.3V~5.5V Ta=0~70°C
4.5V~5.5V Ta=0~70°C
2.2V~3.6V Ta=-40°C~85°C
3.3V~5.5V Ta=-40°C~85°C
4.5V~5.5V Ta=-40°C~85°C
fLIRC
System Clock (LIRC)
5V
—
2.2V~5.5V Ta=-40°C~85°C
tSST
System start-up timer period
(wake-up from power down mode)
—
fSYS=HXT
fSYS=HIRC
tTC
TCn input pin pulse width
—
—
tINT
Interrupt input pin pulse width
—
—
System Reset Delay Time
(Power on reset)
—
—
tRSTD
System Reset Delay Time
(Any reset except Power on reset)
—
—
Ta=25°C
Min. Typ. Max. Unit
32
32
32
-2%
-2%
-5%
-5%
-8%
-8%
-8%
-12%
-12%
-12%
28.8
16
1024
2
0.3
10
— 4000 kHz
— 8000 kHz
— 12000 kHz
4/8 +2% MHz
12 +2% MHz
4/8 +5% MHz
12 +5% MHz
4 +8% MHz
4/8 +8% MHz
12 +8% MHz
4 +12% MHz
4/8 +12% MHz
12 +12% MHz
32 35.2 kHz
32 51.2 kHz
——
—
—
tSYS
— — μs
— — μs
25 50 100 ms
8.3 16.7 33.3 ms
Note: 1. tSYS=1/fSYS
2. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1F decoupling capacitor should be
connected between VDD and VSS and located as close to the device as possible.
ADC Characteristics
Symbol
Parameter
DNL A/D Differential Non-linearity
INL
ADC Integral Non-linearity
IADC
tAD
tADC
tON2ST
VREF
Additional Power Consumption if
A/D Converter is Used
A/D Clock Period
A/D Conversion Time(note)
ADC on to ADC Start
Input Reference Voltage Range
Test Conditions
VDD
Conditions
3V
5V
tAD=0.5μs
3V
5V
tAD=0.5μs
5V
3V
—
5V
2.7V~5.5V
—
2.7V~5.5V 12-bit ADC
2.7V~5.5V
—
—
—
Ta=25°C
Min. Typ. Max. Unit
-2 — +2 LSB
-4 — +4 LSB
— 0.5 0.75 mA
— 1.0 1.5 mA
0.5 —
10
μs
— 16
—
tAD
2
—
—
μs
2.0 — VDD+1 V
Note: ADC conversion time (tAD)= n (bits ADC) + 4 (sampling time), the conversion for each bit needs one ADC
clock(tAD).
Rev. 1.00
10
July 16, 2012