5.2 Memory Reset
After an interruption in communication due protocol errors, power loss or any reason, perform "Acknowledge Polling" to
properly recover from the condition. Acknowledge polling consists of sending a start condition followed by a valid
CryptoMemory command byte and determining if the device responded with an ACKNOWLEDGE.
Figure 5-1. Bus Time for Two-wire Serial Communications
SCL: Serial Clock, SDA: Serial Data I/O
tF
tHIGH
tR
SCL
tLOW
tLOW
SDA IN
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
tAA
tDH
tBUF
SDA OUT
Figure 5-2. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
(1)
twr
START
CONDITION
Note:
The write cycle time twr is the time from a valid stop condition of a write sequence to the end of the internal
clear/write cycle
Atmel AT88SC0204CA [Summary DATASHEET]
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5202FS−CRYPTO−12/11