HM62256A Series
HM62256A Series
AC Characteristics (Ta = 0 to +70ยฐC, VCC = 5 V ยฑ 10%, unless otherwise noted.)
Test Conditions
โข Input pulse levels: 0.8 V to 2.4 V
โข Input and output timing refernce levels: 1.5 V
โข Input rise and fall times: 5 ns
โข Output load: 1 TTL Gate + CL (100 pF)
(Including scope & jig)
Read Cycle
HM62256A-8 HM62256A-10 HM62256A-12 HM62256A-15
โโโโโโ โโโโโโ โโโโโโ โโโโโโ
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Note
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Read cycle time
tRC
85 โ 100 โ 120 โ 150 โ ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Address access time tAA
โ 85 โ 100 โ 120 โ 150 ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Chip select
access time
tACS
โ 85 โ 100 โ 120 โ 150 ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Output enable to
output valid
tOE
โ 45 โ 50 โ 60 โ 70 ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Chip selection to
output in low-Z
tCLZ
10 โ 10 โ 10 โ 10 โ ns 2
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Output enable to
output in low-Z
tOLZ
5
โ5
โ5
โ5
โ ns 2
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Chip deselection to
tCHZ
0
30 0
35 0
40 0
50 ns
1, 2
output in high-Z
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Output disable to
output in high-Z
tOHZ
0
30 0
35 0
40 0
50 ns
1, 2
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Output hold from
address change
tOH
5
โ 10 โ 10 โ 10 โ
ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
6