Quad 2−Input NAND Gate with Schmitt−Trigger Inputs
High−Performance Silicon−Gate CMOS
The 74HC132 is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs.
The HC132 can be used to enhance noise immunity or to square up slowly changing waveforms.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements as Defined by JEDEC Standard No. 7A
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These are Pb−Free Devices